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fuchsia.hardware.vreg

PROTOCOLS

Vreg

Defined in fuchsia.hardware.vreg/vreg.fidl

GetRegulatorParams

Request

NameType

Response

NameType
params VregParams

GetVoltageStep

Request

NameType

Response

NameType
result uint32

SetVoltageStep

Request

NameType
step uint32

Response

NameType
st zx/status

STRUCTS

VregParams

Defined in fuchsia.hardware.vreg/vreg.fidl

NameTypeDescriptionDefault
min_uv uint32 No default
step_size_uv uint32 No default
num_steps uint32 No default