fuchsia.hardware.clockimpl

Added: 22

PROTOCOLS

ClockImpl

Defined in fuchsia.hardware.clockimpl/clock-impl.fidl

Each method in this protocol has a corresponding method in clock.fidl with an additional ID parameter. The ID parameter in each method below designates the clock in the system that the call is intended to target. Conversely, each instance of ZX_PROTOCOL_CLOCK pertains to only one clock in the system. See clock.fidl for documentation for each method.

Disable

Request

NameType
id uint32

Response

NameType
payload ClockImpl_Disable_Result

Enable

Clock Gating Control.

Request

NameType
id uint32

Response

NameType
payload ClockImpl_Enable_Result

GetInput

Request

NameType
id uint32

Response

NameType
payload ClockImpl_GetInput_Result

GetNumInputs

Request

NameType
id uint32

Response

NameType
payload ClockImpl_GetNumInputs_Result

GetRate

Request

NameType
id uint32

Response

NameType
payload ClockImpl_GetRate_Result

IsEnabled

Request

NameType
id uint32

Response

NameType
payload ClockImpl_IsEnabled_Result

QuerySupportedRate

Request

NameType
id uint32
hz uint64

Response

NameType
payload ClockImpl_QuerySupportedRate_Result

SetInput

Clock input control.

Request

NameType
id uint32
idx uint32

Response

NameType
payload ClockImpl_SetInput_Result

SetRate

Clock Frequency Scaling Control.

Request

NameType
id uint32
hz uint64

Response

NameType
payload ClockImpl_SetRate_Result

STRUCTS

ClockImpl_Disable_Response

Defined in fuchsia.hardware.clockimpl/clock-impl.fidl

<EMPTY>

ClockImpl_Enable_Response

Defined in fuchsia.hardware.clockimpl/clock-impl.fidl

<EMPTY>

ClockImpl_GetInput_Response

Defined in fuchsia.hardware.clockimpl/clock-impl.fidl

FieldTypeDescriptionDefault
index uint32 No default

ClockImpl_GetNumInputs_Response

Defined in fuchsia.hardware.clockimpl/clock-impl.fidl

FieldTypeDescriptionDefault
n uint32 No default

ClockImpl_GetRate_Response

Defined in fuchsia.hardware.clockimpl/clock-impl.fidl

FieldTypeDescriptionDefault
hz uint64 No default

ClockImpl_IsEnabled_Response

Defined in fuchsia.hardware.clockimpl/clock-impl.fidl

FieldTypeDescriptionDefault
enabled bool No default

ClockImpl_QuerySupportedRate_Response

Defined in fuchsia.hardware.clockimpl/clock-impl.fidl

FieldTypeDescriptionDefault
hz uint64 No default

ClockImpl_SetInput_Response

Defined in fuchsia.hardware.clockimpl/clock-impl.fidl

<EMPTY>

ClockImpl_SetRate_Response

Defined in fuchsia.hardware.clockimpl/clock-impl.fidl

<EMPTY>

DisableType

Defined in fuchsia.hardware.clockimpl/init.fidl

<EMPTY>

EnableType

Defined in fuchsia.hardware.clockimpl/init.fidl

<EMPTY>

InitMetadata

Defined in fuchsia.hardware.clockimpl/init.fidl

Passed to the clock core driver in metadata as DEVICE_METADATA_CLOCK_INIT. Steps are processed sequentially in the order that they appear in the vector. Processing occurs once during the clock core driver's bind hook.

FieldTypeDescriptionDefault
steps vector<InitStep> No default

TABLES

InitStep

Defined in fuchsia.hardware.clockimpl/init.fidl

A single init step to be performed by the clock core driver.

OrdinalFieldTypeDescription
id uint32

The platform-specific clock ID that this step operates on. This must be unset if call is of type InitCall::delay and must be set otherwise.

call InitCall

A call to make on this clock. This must be set.

UNIONS

ClockImpl_Disable_Result strict

Defined in fuchsia.hardware.clockimpl/clock-impl.fidl

OrdinalVariantTypeDescription
response ClockImpl_Disable_Response
err zx/Status
framework_err internal

ClockImpl_Enable_Result strict

Defined in fuchsia.hardware.clockimpl/clock-impl.fidl

OrdinalVariantTypeDescription
response ClockImpl_Enable_Response
err zx/Status
framework_err internal

ClockImpl_GetInput_Result strict

Defined in fuchsia.hardware.clockimpl/clock-impl.fidl

OrdinalVariantTypeDescription
response ClockImpl_GetInput_Response
err zx/Status
framework_err internal

ClockImpl_GetNumInputs_Result strict

Defined in fuchsia.hardware.clockimpl/clock-impl.fidl

OrdinalVariantTypeDescription
response ClockImpl_GetNumInputs_Response
err zx/Status
framework_err internal

ClockImpl_GetRate_Result strict

Defined in fuchsia.hardware.clockimpl/clock-impl.fidl

OrdinalVariantTypeDescription
response ClockImpl_GetRate_Response
err zx/Status
framework_err internal

ClockImpl_IsEnabled_Result strict

Defined in fuchsia.hardware.clockimpl/clock-impl.fidl

OrdinalVariantTypeDescription
response ClockImpl_IsEnabled_Response
err zx/Status
framework_err internal

ClockImpl_QuerySupportedRate_Result strict

Defined in fuchsia.hardware.clockimpl/clock-impl.fidl

OrdinalVariantTypeDescription
response ClockImpl_QuerySupportedRate_Response
err zx/Status
framework_err internal

ClockImpl_SetInput_Result strict

Defined in fuchsia.hardware.clockimpl/clock-impl.fidl

OrdinalVariantTypeDescription
response ClockImpl_SetInput_Response
err zx/Status
framework_err internal

ClockImpl_SetRate_Result strict

Defined in fuchsia.hardware.clockimpl/clock-impl.fidl

OrdinalVariantTypeDescription
response ClockImpl_SetRate_Response
err zx/Status
framework_err internal

InitCall flexible

Defined in fuchsia.hardware.clockimpl/init.fidl

A fuchsia.hardware.clock.Clock call to make as part of an InitStep.

OrdinalVariantTypeDescription
enable EnableType

If set, the clock core driver will call Enable.

disable DisableType

If set, the clock core driver will call Disable.

rate_hz uint64

If set, the clock core driver will call SetRate with the given frequency in Hertz.

input_idx uint32

If set, the clock core driver will call SetInput with the given input index.

delay zx/Duration

If set, the clock core driver will delay for this long before processing the next step.

SERVICES

Service

Defined in fuchsia.hardware.clockimpl/clock-impl.fidl

NameTypeTransport
device fuchsia.hardware.clockimpl/ClockImpl Driver