fuchsia.hardware.registers

Added: HEAD

PROTOCOLS

Device

Defined in fuchsia.hardware.registers/register-util.fidl

ReadRegister16

Request

NameType
offset uint64
mask uint16

Response

NameType
payload Device_ReadRegister16_Result

ReadRegister32

Request

NameType
offset uint64
mask uint32

Response

NameType
payload Device_ReadRegister32_Result

ReadRegister64

Request

NameType
offset uint64
mask uint64

Response

NameType
payload Device_ReadRegister64_Result

ReadRegister8

Reads from the register from the specified MMIO offset in register width equal to 8, 16, 32, and 64 bit variants. |offset| : Offset from base of MMIO to read from. Offset must be aligned to beginning of register. For example, for 32 bits, offset must be divisible by 4, and for 64 bits, offset must be divisible by 8. If this is not satisfied, read will fail. |mask| : Mask of bits to read. For example, to read the lower 2 bytes of data in a 32 bit register, mask should be 0x0000FFFF. @Returns: |value| : Value of register at the specified address.

Request

NameType
offset uint64
mask uint8

Response

NameType
payload Device_ReadRegister8_Result

WriteRegister16

Request

NameType
offset uint64
mask uint16
value uint16

Response

NameType
payload Device_WriteRegister16_Result

WriteRegister32

Request

NameType
offset uint64
mask uint32
value uint32

Response

NameType
payload Device_WriteRegister32_Result

WriteRegister64

Request

NameType
offset uint64
mask uint64
value uint64

Response

NameType
payload Device_WriteRegister64_Result

WriteRegister8

Writes to the register at the specified MMIO offset in register width equal to 8, 16, 32, and 64 bit variants |offset| : Offset from base of MMIO to write to. Offset must be aligned to beginning of register. For example, for 32 bits, offset must be divisible by 4, and for 64 bits, offset must be divisible by 8. If this is not satisfied, write will fail. |mask| : Mask of bits to write. For example, to write to the lower 2 bytes of data in a 32 bit register, mask should be 0x0000FFFF. |value| : Value of register at the specified address.

Request

NameType
offset uint64
mask uint8
value uint8

Response

NameType
payload Device_WriteRegister8_Result

STRUCTS

Device_ReadRegister16_Response

Defined in fuchsia.hardware.registers/register-util.fidl

FieldTypeDescriptionDefault
value uint16 No default

Device_ReadRegister32_Response

Defined in fuchsia.hardware.registers/register-util.fidl

FieldTypeDescriptionDefault
value uint32 No default

Device_ReadRegister64_Response

Defined in fuchsia.hardware.registers/register-util.fidl

FieldTypeDescriptionDefault
value uint64 No default

Device_ReadRegister8_Response

Defined in fuchsia.hardware.registers/register-util.fidl

FieldTypeDescriptionDefault
value uint8 No default

Device_WriteRegister16_Response

Defined in fuchsia.hardware.registers/register-util.fidl

<EMPTY>

Device_WriteRegister32_Response

Defined in fuchsia.hardware.registers/register-util.fidl

<EMPTY>

Device_WriteRegister64_Response

Defined in fuchsia.hardware.registers/register-util.fidl

<EMPTY>

Device_WriteRegister8_Response

Defined in fuchsia.hardware.registers/register-util.fidl

<EMPTY>

TABLES

MaskEntry

Defined in fuchsia.hardware.registers/metadata.fidl

OrdinalFieldTypeDescription
mask Mask
mmio_offset uint64

MMIO offset of mask range. Should be aligned to 4 for 32-bit registers, 8 for 64-bit registers, etc.

count uint32

Number of masks with this mask value.

overlap_check_on bool

Overlap check. If true, checks this mask for overlapping bits defined for all registers. If false, doesn't check. If absent, interpreted as true.

Metadata

Defined in fuchsia.hardware.registers/metadata.fidl

OrdinalFieldTypeDescription
registers vector<RegistersMetadataEntry>

Vector of Registers metadata. One for each register to be published.

RegistersMetadataEntry

Defined in fuchsia.hardware.registers/metadata.fidl

OrdinalFieldTypeDescription
name string[32]

Name for binding purposes (BIND_REGISTER_NAME device property).

mmio_id uint32

MMIO ID for MMIO corresponding to register.

masks vector<MaskEntry>

A run length encoded list of masks. Should be in order starting from base address. Masks should all be of the same type.

UNIONS

Device_ReadRegister16_Result strict

Defined in fuchsia.hardware.registers/register-util.fidl

OrdinalVariantTypeDescription
response Device_ReadRegister16_Response
err zx/Status

Device_ReadRegister32_Result strict

Defined in fuchsia.hardware.registers/register-util.fidl

OrdinalVariantTypeDescription
response Device_ReadRegister32_Response
err zx/Status

Device_ReadRegister64_Result strict

Defined in fuchsia.hardware.registers/register-util.fidl

OrdinalVariantTypeDescription
response Device_ReadRegister64_Response
err zx/Status

Device_ReadRegister8_Result strict

Defined in fuchsia.hardware.registers/register-util.fidl

OrdinalVariantTypeDescription
response Device_ReadRegister8_Response
err zx/Status

Device_WriteRegister16_Result strict

Defined in fuchsia.hardware.registers/register-util.fidl

OrdinalVariantTypeDescription
response Device_WriteRegister16_Response
err zx/Status

Device_WriteRegister32_Result strict

Defined in fuchsia.hardware.registers/register-util.fidl

OrdinalVariantTypeDescription
response Device_WriteRegister32_Response
err zx/Status

Device_WriteRegister64_Result strict

Defined in fuchsia.hardware.registers/register-util.fidl

OrdinalVariantTypeDescription
response Device_WriteRegister64_Response
err zx/Status

Device_WriteRegister8_Result strict

Defined in fuchsia.hardware.registers/register-util.fidl

OrdinalVariantTypeDescription
response Device_WriteRegister8_Response
err zx/Status

Mask strict

Defined in fuchsia.hardware.registers/metadata.fidl

OrdinalVariantTypeDescription
r8 uint8
r16 uint16
r32 uint32
r64 uint64

CONSTANTS

NameValueTypeDescription
MAX_NAME_LENGTH 32 uint32

Maximum length of a name string.

SERVICES

Service

Defined in fuchsia.hardware.registers/register-util.fidl

NameTypeTransport
device fuchsia.hardware.registers/Device Channel