fuchsia.hardware.pci

PROTOCOLS

Bus

Defined in fuchsia.hardware.pci/pci.fidl

The Bus protocol provides information about PCI device children on the PCI providing the service.

GetDevices

Retrieve all Devices on the Bus.

Request

<EMPTY>

Response

Name	Type
devices	vector<PciDevice>:64

GetHostBridgeInfo

Retrieve information about the segment group and buses covered by a Bus.

Request

<EMPTY>

Response

Name	Type
info	HostBridgeInfo

ReadBar

Read from a Device's base address register (BAR). The BAR must be an MMIO type.

Parameters |device|: The address of the device to read from. |bar_id|: The ID of the BAR to read. |offset|: The offset, in bytes, to start the read (default: 0 bytes). |size|: The size of the read (default: 128 bytes). The max size for a read is |READBAR_MAX_SIZE|.

Errors: |ZX_ERR_NOT_FOUND|: |device| was not found, or |bar_id| did not exist in |device|. |ZX_ERR_INVALID_ARGS|: |bar_id| is invalid, or offset / size combined are invalid for the given BAR's size. |ZX_ERR_NOT_SUPPORTED|: The BAR specified by |bar_id| is not an MMIO BAR.

Request

Name	Type
device	Address
bar_id	uint8
offset	uint64
size	uint64

Response

Name	Type
payload	Bus_ReadBar_Result

Device

Defined in fuchsia.hardware.pci/pci.fidl

AckInterrupt

Alerts the bus driver to deassert the raised legacy interrupt so that it may be waited on again. Only used if |SetInterruptMode| was called with |PCI_INTERRUPT_MODE_LEGACY|.

Errors: |ZX_ERR_BAD_STATE|: device is not configured to use the Legacy interrupt mode.

Request

<EMPTY>

Response

Name	Type
payload	Device_AckInterrupt_Result

GetBar

Retrieves information for a specified Base Address Register (BAR). If the BAR contains MSI-X capability tables then an attempt will be made to return an MMIO region excluding those tables, if possible. Otherwise, an error will be returned.

Parameters: |bar_id|: The id of the BAR being requested. Valid range is [0, 6).

Errors: |ZX_ERR_ACCESS_DENIED|: The specified BAR does not have a driver-accessible region due to the presence of MSI-X tables. To use MSI-X see the |SetInterruptMode| method. |ZX_ERR_INTERNAL|: A bus driver error has occurred. |ZX_ERR_INVALID_ARGS|: The |bar_id| specified is outside of the acceptable range. |ZX_ERR_NOT_FOUND|: The specified |bar_id| does not exist for this device.

Request

Name	Type
bar_id	uint32

Response

Name	Type
payload	Device_GetBar_Result

GetBti

Returns the Bus Transaction Intiator (BTI) at a given index for the device.

Parameters: |index|: the BTI to request.

Errors: |ZX_ERR_OUT_OF_RANGE|: |index| was not 0.

Request

Name	Type
index	uint32

Response

Name	Type
payload	Device_GetBti_Result

GetCapabilities

Returns a vector of offsets in configuration space corresponding to capabilities matching the provided capability |id|. If no corresponding match is found then the vector will be empty.

Parameters: |id|: the capability id to search for.

Request

Name	Type
id	CapabilityId

Response

Name	Type
offsets	vector<ConfigOffset>:32

GetDeviceInfo

Returns a structure containing device information from the configuration header.

Request

<EMPTY>

Response

Name	Type
info	DeviceInfo

GetExtendedCapabilities

Returns a vector of offsets in configuration space corresponding to extended capabilities matching the provided extended capability |id|. If no corresponding match is found then the vector will be empty.

Parameters: |id|: the capability id to search for

Request

Name	Type
id	ExtendedCapabilityId

Response

Name	Type
offsets	vector<ExtendedConfigOffset>:32

GetInterruptModes

Returns the supported interrupt modes for a device.

Request

<EMPTY>

Response

Name	Type
modes	InterruptModes

MapInterrupt

Maps a device's interrupt to a zx:interrupt. The device's interrupt mode must already be configured with |SetInterruptMode|, and |which_irq| must be >= to the number of interrupts reported for that interrupt mode by |GetInterruptModes|. A Legacy interrupt may be mapped multiple times, but the handles will point to the same interrupt object. MSI & MSI-X interrupts may only have one outstanding mapping at a time per interrupt. Outstanding MSI & MSI-X interrupt handles must be closed before attempting to change the interrupt mode in a subsequent call to |SetInterruptMode|.

Parameters: |which_irq|: The id of the interrupt to map.

Errors: |ZX_ERR_ALREADY_BOUND|: The interrupt specified by |which_irq| is already mapped to a valid handle. |ZX_ERR_BAD_STATE|: interrupts are currently disabled for the device. |ZX_ERR_INVALID_ARGS|: |which_irq| is invalid for the mode.

Request

Name	Type
which_irq	uint32

Response

Name	Type
payload	Device_MapInterrupt_Result

ReadConfig16

Reads two bytes from the device's configuration space. |Offset| must be within [0x0, 0xFE] if PCI, or [0x0, 0xFFE] if PCIe. In most cases a device will be PCIe.

Parameters: |offset|: The offset into the device's configuration space to read.

Errors: |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.

Request

Name	Type
offset	ExtendedConfigOffset

Response

Name	Type
payload	Device_ReadConfig16_Result

ReadConfig32

Reads four bytes from the device's configuration space. |Offset| must be within [0x0, 0xFC] if PCI, or [0x0, 0xFFC] if PCIe. In most cases a device will be PCIe.

Parameters: |offset|: The offset into the device's configuration space to read.

Errors: |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.

Request

Name	Type
offset	ExtendedConfigOffset

Response

Name	Type
payload	Device_ReadConfig32_Result

ReadConfig8

Reads a byte from the device's configuration space. |Offset| must be within [0x0, 0xFF] if PCI, or [0x0, 0xFFF) if PCIe. In most cases a device will be PCIe.

Parameters: |offset|: The offset into the device's configuration space to read.

Errors: |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.

Request

Name	Type
offset	ExtendedConfigOffset

Response

Name	Type
payload	Device_ReadConfig8_Result

ResetDevice

Initiates a function level reset for the device. This is a synchronous operation that will not return ontil the reset is complete. Interrupt operation of the device must be disabled before initiating a reset.

Errors: |ZX_ERR_BAD_STATE|: Interrupts were not disabled before calling |ResetDevice|. |ZX_ERR_NOT_SUPPORTED|: The device does not support reset. |ZX_ERR_TIMED_OUT|: The device did not complete its reset in the expected amount of time and is presumed to no longer be operating properly.

Request

<EMPTY>

Response

Name	Type
payload	Device_ResetDevice_Result

SetBusMastering

Enables or disables the bus mastering capability for the device.

Parameters: |enable|: true to enable bus mastering, false to disable.

Errors: |ZX_ERR_BAD_STATE|: Method was called while the device is disabled.

Request

Name	Type
enabled	bool

Response

Name	Type
payload	Device_SetBusMastering_Result

SetInterruptMode

Configures the interrupt mode for a device. When changing from one interrupt mode to another the driver must ensure existing interrupt handles are closed beforehand.

Parameters: |mode|: The |InterruptMode| to request from the bus driver. |requested_irq_count|: The number of interrupts requested.

Errors: |ZX_ERR_BAD_STATE|: The driver attempted to change interrupt mode while existing handles to mapped MSIs exist. |ZX_ERR_INVALID_ARGS|: |requested_irq_count| is 0. |ZX_ERR_NOT_SUPPORTED|: The provided |mode| is not supported, or invalid.

Request

Name	Type
mode	InterruptMode
requested_irq_count	uint32

Response

Name	Type
payload	Device_SetInterruptMode_Result

WriteConfig16

Writes two bytes to the device's configuration space. The acceptable ranges of |offset| for writes are [0x40, 0xFE] if PCI, or [0x40, 0xFFE] if PCIe. For most purposes a device will be PCIe.

Parameters |offset|: The offset into the device's configuration space to read. |value|: The value to write.

Errors: |ZX_ERR_ACCESS_DENIED|: |offset| is within the device's configuration header. |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.

Request

Name	Type
offset	ExtendedConfigOffset
value	uint16

Response

Name	Type
payload	Device_WriteConfig16_Result

WriteConfig32

Writes four bytes to the device's configuration space. The acceptable ranges of |offset| for writes are [0x40, 0xFC] if PCI, or [0x40, 0xFFC] if PCIe. For most purposes a device will be PCIe.

Parameters |offset|: The offset into the device's configuration space to read. |value|: The value to write.

Errors: |ZX_ERR_ACCESS_DENIED|: |offset| is within the device's configuration header. |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.

Request

Name	Type
offset	ExtendedConfigOffset
value	uint32

Response

Name	Type
payload	Device_WriteConfig32_Result

WriteConfig8

Writes a byte to the device's configuration space. The acceptable ranges of |offset| for writes are [0x40, 0xFF] if PCI, or [0x40, 0xFFF] if PCIe. For most purposes a device will be PCIe.

Parameters |offset|: The offset into the device's configuration space to read. |value|: The value to write.

Errors: |ZX_ERR_ACCESS_DENIED|: |offset| is within the device's configuration header. |ZX_ERR_OUT_OF_RANGE|: |offset| is an invalid address.

Request

Name	Type
offset	ExtendedConfigOffset
value	uint8

Response

Name	Type
payload	Device_WriteConfig8_Result

STRUCTS

Address

Defined in fuchsia.hardware.pci/pci.fidl

An address of a PCI device.

Field	Type	Description	Default
bus	uint8		No default
device	uint8		No default
function	uint8		No default

Bar resource

Defined in fuchsia.hardware.pci/pci.fidl

Describes and provides access to a given Base Address Register for the device.

Field	Type	Description	Default
bar_id	uint32	The BAR id, [0-5).	No default
size	uint64		No default
result	BarResult		No default

BaseAddress

Defined in fuchsia.hardware.pci/pci.fidl

Field	Type	Description	Default
address	uint64		No default
size	uint64		No default
is_memory	bool		No default
is_prefetchable	bool		No default
is_64bit	bool		No default
id	uint8		No default

Bus_ReadBar_Response

Defined in fuchsia.hardware.pci/pci.fidl

Field	Type	Description	Default
buffer	vector<uint8>		No default

Capability

Defined in fuchsia.hardware.pci/pci.fidl

Field	Type	Description	Default
id	uint8		No default
offset	uint8		No default

DeviceInfo

Defined in fuchsia.hardware.pci/pci.fidl

Device specific information from a device's configuration header. PCI Local Bus Specification v3, chapter 6.1.

Field	Type	Description	Default
vendor_id	uint16	Device identification information.	No default
device_id	uint16		No default
base_class	uint8		No default
sub_class	uint8		No default
program_interface	uint8		No default
revision_id	uint8		No default
bus_id	uint8	Information pertaining to the device's location in the bus topology.	No default
dev_id	uint8		No default
func_id	uint8		No default
padding	Padding		No default

Device_AckInterrupt_Response

Defined in fuchsia.hardware.pci/pci.fidl

<EMPTY>

Device_GetBar_Response resource

Defined in fuchsia.hardware.pci/pci.fidl

Field	Type	Description	Default
result	Bar		No default

Device_GetBti_Response resource

Defined in fuchsia.hardware.pci/pci.fidl

Field	Type	Description	Default
bti	handle<bti>		No default

Device_MapInterrupt_Response resource

Defined in fuchsia.hardware.pci/pci.fidl

Field	Type	Description	Default
interrupt	handle<interrupt>		No default

Device_ReadConfig16_Response

Defined in fuchsia.hardware.pci/pci.fidl

Field	Type	Description	Default
value	uint16		No default

Device_ReadConfig32_Response

Defined in fuchsia.hardware.pci/pci.fidl

Field	Type	Description	Default
value	uint32		No default

Device_ReadConfig8_Response

Defined in fuchsia.hardware.pci/pci.fidl

Field	Type	Description	Default
value	uint8		No default

Device_ResetDevice_Response

Defined in fuchsia.hardware.pci/pci.fidl

<EMPTY>

Device_SetBusMastering_Response

Defined in fuchsia.hardware.pci/pci.fidl

<EMPTY>

Device_SetInterruptMode_Response

Defined in fuchsia.hardware.pci/pci.fidl

<EMPTY>

Device_WriteConfig16_Response

Defined in fuchsia.hardware.pci/pci.fidl

<EMPTY>

Device_WriteConfig32_Response

Defined in fuchsia.hardware.pci/pci.fidl

<EMPTY>

Device_WriteConfig8_Response

Defined in fuchsia.hardware.pci/pci.fidl

<EMPTY>

ExtendedCapability

Defined in fuchsia.hardware.pci/pci.fidl

Field	Type	Description	Default
id	uint16		No default
offset	uint16		No default

HostBridgeInfo

Defined in fuchsia.hardware.pci/pci.fidl

Field	Type	Description	Default
name	string:32		No default
start_bus_number	uint8		No default
end_bus_number	uint8		No default
segment_group	uint16		No default

InterruptModes

Defined in fuchsia.hardware.pci/pci.fidl

Returned by |GetInterruptModes|. Contains the number of interrupts supported by a given PCI device interrupt mode. 0 is returned for a mode if unsupported.

Field	Type	Description	Default
has_legacy	bool	|True| if the device supports a legacy interrupt.	No default
msi_count	uint8	The number of Message-Signaled interrupted supported. Will be in the range of [0, 0x8) depending on device support.	No default
msix_count	uint16	The number of MSI-X interrupts supported. Will be in the range of [0, 0x800), depending on device and platform support.	No default

IoBar resource

Defined in fuchsia.hardware.pci/pci.fidl

Field	Type	Description	Default
address	uint64		No default
resource	handle<resource>		No default

Padding

Defined in fuchsia.hardware.pci/pci.fidl

<EMPTY>

PciDevice

Defined in fuchsia.hardware.pci/pci.fidl

Field	Type	Description	Default
base_addresses	vector<BaseAddress>:6		No default
capabilities	vector<Capability>:32		No default
ext_capabilities	vector<ExtendedCapability>:32		No default
config	vector<uint8>:256		No default
bus_id	uint8		No default
device_id	uint8		No default
function_id	uint8		No default

ENUMS

CapabilityId flexible

Type: uint8

Defined in fuchsia.hardware.pci/pci.fidl

PCI Capability ID. PCI Local Bus Specification v3, appendex H.

Name	Value	Description
NULL	0
PCI_PWR_MGMT	1
AGP	2
VITAL_PRODUCT_DATA	3
SLOT_IDENTIFICATION	4
MSI	5
COMPACT_PCI_HOTSWAP	6
PCIX	7
HYPERTRANSPORT	8
VENDOR	9
DEBUG_PORT	10
COMPACT_PCI_CRC	11
PCI_HOT_PLUG	12
PCI_BRIDGE_SUBSYSTEM_VID	13
AGP8X	14
SECURE_DEVICE	15
PCI_EXPRESS	16
MSIX	17
SATA_DATA_NDX_CFG	18
ADVANCED_FEATURES	19
ENHANCED_ALLOCATION	20
FLATTENING_PORTAL_BRIDGE	21

Config flexible

Type: uint16

Defined in fuchsia.hardware.pci/pci.fidl

PCI Configuration Header registers. PCI Local Bus Specification v3, chapter 6.1.

Name	Value	Description
VENDOR_ID	0
DEVICE_ID	2
COMMAND	4
STATUS	6
REVISION_ID	8
CLASS_CODE_INTR	9
CLASS_CODE_SUB	10
CLASS_CODE_BASE	11
CACHE_LINE_SIZE	12
LATENCY_TIMER	13
HEADER_TYPE	14
BIST	15
BASE_ADDRESSES	16
CARDBUS_CIS_PTR	40
SUBSYSTEM_VENDOR_ID	44
SUBSYSTEM_ID	46
EXP_ROM_ADDRESS	48
CAPABILITIES_PTR	52
INTERRUPT_LINE	60
INTERRUPT_PIN	61
MIN_GRANT	62
MAX_LATENCY	63

ExtendedCapabilityId flexible

Type: uint16

Defined in fuchsia.hardware.pci/pci.fidl

PCI Extended Capability IDs. PCIe Base Specification rev4, chapter 7.6.

Name	Value	Description
NULL	0
ADVANCED_ERROR_REPORTING	1
VIRTUAL_CHANNEL_NO_MFVC	2
DEVICE_SERIAL_NUMBER	3
POWER_BUDGETING	4
ROOT_COMPLEX_LINK_DECLARATION	5
ROOT_COMPLEX_INTERNAL_LINK_CONTROL	6
ROOT_COMPLEX_EVENT_COLLECTOR_ENDPOINT_ASSOCIATION	7
MULTI_FUNCTION_VIRTUAL_CHANNEL	8
VIRTUAL_CHANNEL	9
RCRB	10
VENDOR	11
CAC	12
ACS	13
ARI	14
ATS	15
SR_IOV	16
MR_IOV	17
MULTICAST	18
PRI	19
ENHANCED_ALLOCATION	20
RESIZABLE_BAR	21
DYNAMIC_POWER_ALLOCATION	22
TPH	23
LATENCY_TOLERANCE_REPORTING	24
SECONDARY_PCI_EXPRESS	25
PMUX	26
PASID	27
LNR	28
DPC	29
L1PM_SUBSTATES	30
PRECISION_TIME_MEASUREMENT	31
MPCIE	32
FRS_QUEUEING	33
READINESS_TIME_REPORTING	34
DESIGNATED_VENDOR	35
VF_RESIZABLE_BAR	36
DATA_LINK_FEATURE	37
PHYSICAL_LAYER_16	38
LANE_MARGINING_AT_RECEIVER	39
HIERARCHY_ID	40
NATIVE_PCIE_ENCLOSURE	41
PHYSICAL_LAYER_32	42
ALTERNATE_PROTOCOL	43
SYSTEM_FIRMWARE_INTERMEDIARY	44

HeaderType flexible

Type: uint8

Defined in fuchsia.hardware.pci/pci.fidl

Name	Value	Description
STANDARD	0
BRIDGE	1
CARD_BUS	2
MASK	127
MULTI_FN	128

InterruptMode flexible

Type: uint8

Defined in fuchsia.hardware.pci/pci.fidl

Used with ||SetInterruptMode| to configure an interrupt mode for the device. Devices configured to use the LEGACY Irq mode must ack their interrupt after servicing by calling |AckInterrupt|. To avoid this, LEGACY_NOACK can be used, but the driver's interrupt function will be disabled by the PCI Bus Driver if it sees excessive interrupt triggers in a given period.

Name	Value	Description
DISABLED	0
LEGACY	1	Legacy interrupt mode.
LEGACY_NOACK	2	Legacy interrupt mode (without ACKing, see |AckInterrupt|).
MSI	3	MSI (messaage-signaled interrupt) mode.
MSI_X	4	MSI-X mode.

UNIONS

BarResult flexible resource

Defined in fuchsia.hardware.pci/pci.fidl

Ordinal	Variant	Type	Description
1	io	IoBar
2	vmo	handle<vmo>

Bus_ReadBar_Result strict

Defined in fuchsia.hardware.pci/pci.fidl

Ordinal	Variant	Type	Description
1	response	Bus_ReadBar_Response
2	err	zx/Status

Device_AckInterrupt_Result strict

Defined in fuchsia.hardware.pci/pci.fidl

Ordinal	Variant	Type	Description
1	response	Device_AckInterrupt_Response
2	err	zx/Status

Device_GetBar_Result strict resource

Defined in fuchsia.hardware.pci/pci.fidl

Ordinal	Variant	Type	Description
1	response	Device_GetBar_Response
2	err	zx/Status

Device_GetBti_Result strict resource

Defined in fuchsia.hardware.pci/pci.fidl

Ordinal	Variant	Type	Description
1	response	Device_GetBti_Response
2	err	zx/Status

Device_MapInterrupt_Result strict resource

Defined in fuchsia.hardware.pci/pci.fidl

Ordinal	Variant	Type	Description
1	response	Device_MapInterrupt_Response
2	err	zx/Status

Device_ReadConfig16_Result strict

Defined in fuchsia.hardware.pci/pci.fidl

Ordinal	Variant	Type	Description
1	response	Device_ReadConfig16_Response
2	err	zx/Status

Device_ReadConfig32_Result strict

Defined in fuchsia.hardware.pci/pci.fidl

Ordinal	Variant	Type	Description
1	response	Device_ReadConfig32_Response
2	err	zx/Status

Device_ReadConfig8_Result strict

Defined in fuchsia.hardware.pci/pci.fidl

Ordinal	Variant	Type	Description
1	response	Device_ReadConfig8_Response
2	err	zx/Status

Device_ResetDevice_Result strict

Defined in fuchsia.hardware.pci/pci.fidl

Ordinal	Variant	Type	Description
1	response	Device_ResetDevice_Response
2	err	zx/Status

Device_SetBusMastering_Result strict

Defined in fuchsia.hardware.pci/pci.fidl

Ordinal	Variant	Type	Description
1	response	Device_SetBusMastering_Response
2	err	zx/Status

Device_SetInterruptMode_Result strict

Defined in fuchsia.hardware.pci/pci.fidl

Ordinal	Variant	Type	Description
1	response	Device_SetInterruptMode_Response
2	err	zx/Status

Device_WriteConfig16_Result strict

Defined in fuchsia.hardware.pci/pci.fidl

Ordinal	Variant	Type	Description
1	response	Device_WriteConfig16_Response
2	err	zx/Status

Device_WriteConfig32_Result strict

Defined in fuchsia.hardware.pci/pci.fidl

Ordinal	Variant	Type	Description
1	response	Device_WriteConfig32_Response
2	err	zx/Status

Device_WriteConfig8_Result strict

Defined in fuchsia.hardware.pci/pci.fidl

Ordinal	Variant	Type	Description
1	response	Device_WriteConfig8_Response
2	err	zx/Status

BITS

Command flexible

Type: uint16

Defined in fuchsia.hardware.pci/pci.fidl

Name	Value	Description
IO_EN	1
MEM_EN	2
BUS_MASTER_EN	4
SPECIAL_EN	8
MEM_WR_INV_EN	16
PAL_SNOOP_EN	32
PERR_RESP_EN	64
AD_STEP_EN	128
SERR_EN	256
FAST_B2B_EN	512

Status flexible

Type: uint16

Defined in fuchsia.hardware.pci/pci.fidl

Name	Value	Description
INTERRUPT	8
NEW_CAPS	16
SIXTYSIX_MHZ	32
FAST_B2B	128
MSTR_PERR	256
DEVSEL_LOW	512
DEVSEL_HIGH	1024
TARG_ABORT_SIG	2048
TARG_ABORT_RCV	4096
MSTR_ABORT_RCV	8192
SERR_SIG	16384
PERR	32768

CONSTANTS

Name	Value	Type	Description
BASE_ADDRESS_COUNT	6	uint32
BASE_CONFIG_SIZE	256	uint32
EXTENDED_CONFIG_SIZE	4096	uint32
MAX_BAR_COUNT	6	uint8
MAX_CAPABILITIES	32	uint32
MAX_DEVICES	64	uint32
MAX_EXT_CAPABILITIES	32	uint32
MAX_NAME_LEN	32	uint32
READBAR_MAX_SIZE	1024	uint32
STATUS_DEVSEL_MASK

ALIASES

Name	Value	Description
ConfigOffset	uint8	An offset from the beginning of a device's PCI configuration space. [0, 0x100) is valid.
ExtendedConfigOffset	uint16	An offset from the beginning of a device's PCIe configuration space. [0, 0x800) is valid.

SERVICES

Service

Defined in fuchsia.hardware.pci/pci.fidl

Name	Type	Transport
device	fuchsia.hardware.pci/Device	Channel