ENUMS
SpiClockPhase flexible
Type: uint32
Defined in fuchsia.hardware.spi.businfo/businfo.fidl
| Name | Value | Description |
|---|---|---|
CLOCK_PHASE_FIRST |
0 |
|
CLOCK_PHASE_SECOND |
1 |
TABLES
SpiBusMetadata
Defined in fuchsia.hardware.spi.businfo/businfo.fidl
Passed to the spi driver in platform device metadata.
| Ordinal | Field | Type | Description |
|---|---|---|---|
1 |
channels |
vector<SpiChannel>:32
|
|
2 |
bus_id |
uint32
|
ID of the bus that these devices are on. Set as a bind property on the nodes added by the SPI core driver. |
SpiChannel
Defined in fuchsia.hardware.spi.businfo/businfo.fidl
Represents a single device on a SPI bus.
| Ordinal | Field | Type | Description |
|---|---|---|---|
1 |
cs |
uint32
|
Chip select number for the device. |
2 |
vid |
uint32
|
Vendor ID. Used when binding via platform bus device IDs. |
3 |
pid |
uint32
|
Product ID. Used when binding via platform bus device IDs. |
4 |
did |
uint32
|
Device ID. Used when binding via platform bus device IDs. |
5 |
cs_polarity_high |
bool
|
Chip select polarity: true == high, false == low. |
6 |
word_length_bits |
uint8
|
Size in bits of a single word on the SPI bus. |
7 |
is_bus_controller |
bool
|
Are we in charge of the bus? |
8 |
clock_polarity_high |
bool
|
Clock polarity. true == high, false == low. |
9 |
clock_phase |
SpiClockPhase
|
Clock phase. |
CONSTANTS
| Name | Value | Type | Description |
|---|---|---|---|
| MAX_SPI_CHANNEL |
32
|
uint32 |